1. Field of the Invention
The invention relates to the field of magnetoresistive random access memory (MRAM) and, in particular, to a tilted array geometry for improved MRAM switching.
2. Description of the Related Art
Traditional electronic memory media have included magnetic core memory, magnetic tapes, and semiconductor based memory. Semiconductor based memory includes such types as random access memory (RAM), read-only-memory (ROM), and flash memory. Semiconductor RAM offers the advantage of fast access, however, it suffers the liability of volatility. The transistors and capacitors comprising semiconductor RAM depend on their conductive or charge state, respectively, to store digital data. Accordingly, the transistors and capacitors must be powered to maintain data stored therein and periodically refreshed. If the circuit loses power even briefly, the information is lost. Thus, semiconductor RAM is referred to as volatile memory.
Semiconductor based memories also suffer from a susceptibility to radiation corruption. Incident radiation can create stray carriers and resultant currents in the semiconductor devices and corrupt information stored therein. Radiation exposure occurs routinely in terrestrial unshielded applications, however, the level of radiation can be several orders of magnitude greater in space. Space vehicles and military equipment are, therefore, typically provided with specially hardened and shielded electronics. However, the shielding and hardening add substantial cost and complexity to such systems.
MRAM is a developing technology that offers the advantages of non-volatility, radiation hardness, and high density. MRAM employs the spin property of electrons and a physical property known as giant magnetoresistance (GMR). A spinning charged body, such as an electron, induces a magnetic field. In the presence of an external magnetic field, the spin of the electron is in one of two directions, either “up spin” or aligned with the magnetic field, or “down spin” or anti-parallel to the magnetic field. Thus, the magnetic field of the electron is either directed “up” or “down” or parallel or anti-parallel with the external magnetic field.
The electrons in most materials are randomly oriented with an electron of any particular orientation being compensated for by an oppositely oriented electron so that the material has no bulk magnetization. However, certain metals, such as Co, Fe, and Ni, as well as certain compounds, can exhibit a bulk magnetization. The electrons in such materials gain energy when they are aligned together and, when they do so, the material retains and exhibits a gross, bulk magnetization. Such materials are termed ferromagnetic.
When thin layers (100–101 atoms thick) of certain ferromagnetic and non-ferromagnetic metals (for example alternating layers of Fe and Cr or Co and Cu) are layered in particular ways, they exhibit variable electrical conductivity depending on the magnetization state of the layers. In particular, if the layers are magnetized in the same direction, the layered material exhibits low electrical resistivity whereas if adjacent layers are magnetized in opposite directions, the layered material exhibits a high electrical resistivity. The up or down spin of the electrons are believed to interact with the bulk magnetization of the layered materials to either facilitate or impede the flow of the electrons under an electric field. When the layers are aligned in the same direction, either the “up” or “down” electrons can travel through the material with minimal scattering and, thus, with low resistivity. The complementary type of electrons will be scattered and experience a higher resistivity. However, in the case where adjacent layers are oppositely magnetized, both “up” and “down” electrons will be scattered by one orientation of layers and, thus, all electrons will be scattered with none seeing an advantageously oriented material.
MRAM employs this variable resistivity to define logic states wherein the high and low resistivity states represent a logical “1” or “0”. Individual cells of layered GMR materials are magnetized or not to form a binary logic state and thus a memory circuit element.
MRAM circuits typically employ an array of conductive lines arranged in an orthogonal geometry as illustrated in FIG. 1. The row and column lines are positioned to intersect adjacent each MRAM cell. When an electrical current is supplied to one of the lines, a magnetic field is induced according to well-understood electromagnetic principles. A row current Irow generates a transverse magnetic field Hy and a column current Icol generates a longitudinal magnetic field Hx through the MRAM cells. The induced magnetic field Hy or Hx impinges on all cells in the corresponding row or column and partially magnetizes those cells. The magnitude of the current in the row and column lines as well as the dimensions and materials of the MRAM cells are chosen such that both a row and a column current is required for the cell to exceed a write threshold in order to switch logic states. In particular, a row or column current by itself should be insufficient to switch a cell, however, applying both a row and a column current will switch the cell at the intersection of the two lines.
FIG. 2 illustrates the switching/no-switching regions of operation for an MRAM cell array. The half-select points are the condition where exclusively a row or a column current is applied. The half-select condition should not switch the cells in the corresponding row or column unless a complementary column or row current is also applied to a particular cell. The full-select point represents a cell where both a row and a column current are applied. The dashed line indicates the condition of equal row and column fields and orthogonal row and current lines. The curve illustrates that the row and column current can be independently varied and the boundary between switching and non-switching conditions. The vector addition of Hx and Hy must result in a total H magnitude to the right of the curve to reliably switch the cell.
This switching protocol places severe requirements on the process tolerances as well as the line currents. An excessive row or column current can inadvertently switch cells in the corresponding row or column that are not intended to be switched. Conversely, an inadequate row or column current can fail to switch a cell when desired. In a similar manner, if the materials or dimensions of a cell vary excessively, the cell can be unintentionally switched or not-switched. These considerations place design constraints on the process as well as present obstacles to scaling the devices for increased circuit density.
Another design goal of electronic circuits in general, including MRAM technologies, is to reduce the drive current for switching. Reducing the drive current reduces the power consumption of the circuit, and incurs less resistive heating within the circuit, and can reduce the size and weight of power supplies. Particularly as the conductive line widths are reduced through scaling, the need to minimize resistive heating becomes acute.
From the foregoing, it can be appreciated that there is a need for an MRAM array geometry that offers improved switching. There is also a need for an array geometry that offers increased fault tolerance and reduced current switching requirements.